Cybernetics And Systems Analysis logo
Editorial Board Announcements Abstracts Authors Archive
Cybernetics And Systems Analysis
International Theoretical Science Journal
UDC 004.05, 004.42
O.O. Letychevskyi1, V.S. Peschanenko2, V.S. Kharchenko3,
V.A. Volkov4, O.M. Odarushchenko5



1 V.M. Glushkov Institute of Cybernetics, National Academy
of Sciences of Ukraine, Kyiv, Ukraine

oleksandr.letychevskyi@litsoft.com.ua

2 Kherson State University, Kherson, Ukraine

volodymyr.peschanenko@litsoft.com.ua

3 M.E. Zhukovsky National Aerospace University
“Kharkiv Aviation Institute,” Kharkiv, Ukraine

v.kharchenko@csn.khai.edu

4 V.M. Glushkov Institute of Cybernetics, National Academy
of Sciences of Ukraine, Kyiv, Ukraine

vlad_volkov_98@yahoo.com

5 SPE “Radix” LLC, Kropyvnytskyi, Ukraine

odarushchenko@gmail.com

MODEL-DRIVEN DEVELOPMENT OF DIGITAL SYSTEM ALGORITHMS
ON PROGRAMMABLE LOGIC INTEGRATED CIRCUITS

Abstract. The paper considers the current trends in the field of automated hardware development, in particular, the development of digital systems using programmable logic integrated circuits on the example of FPGA (Field-Programmable Gate Array). A model-driven development method is proposed that uses an algebraic model of design specifications, requirements, and binary code to apply formal verification methods, model testing, and algebraic matching methods. The specifications of an algebraic hardware model is a behavior algebra defined over set of actions and behaviors.

Keywords: Field-Programmable Gate Array, symbolic modeling, algebraic matching, behavior algebra.



FULL TEXT

REFERENCES

  1. FPGA. URL: www.intel.com/content/www/us/en/products/programmable/fpga/new-to-fpgas/resource -center/overview.html.

  2. V-model. URL: https://www.testingexcellence.com/v-model-in-software-testing/.

  3. VHDL. URL: www.intel.com/content/www/us/en/programmable/support/support-resources/design-examples/ design-software/vhdl.html.

  4. SystemVerilog. URL: www.asic-world.com/systemverilog/tutorial.html.

  5. Cadence. URL: www.cadence.com/.

  6. Xilinx. URL: www.xilinx.com.

  7. Synopsis. URL: www.synopsys.com.

  8. Potium. URL: www.cadence.com/en_US/home/tools/system-design-and-verification/fpga-basedpro totyping/protium-s1-fpga-based-prototyping-platform.html.

  9. Quartus. URL: www.intel.com/content/www/us/en/programmable/downloads/download-center.html

  10. BPMN. URL: www.bpmn.org/.

  11. ITU-T Recommendation, Z.151, User Requirements Notation (URN) — Language definition.

  12. UML. URL: www.uml.org/.

  13. Letichevsky A., Letychevskyi O., Peschanenko V. Insertion modeling and its applications. Computer Science Journal of Moldova. 2016. Vol. 24, Iss. 3. P. 357–370.

  14. Letichevsky A., Gilbert D. A model for interaction of agents and environments. In: Recent Trends in Algebraic Development Technique. LNCS. Bert D., Choppy C. (Eds.). Berlin; Heidelberg: Springer-Verlag, 2000. Vol. 1827. P. 311–328.

  15. Z3 decision procedure. URL: https://github.com/Z3Prover/z3.

  16. CVC4 decision procedure. URL: http://cvc4.cs.stanford.edu.

  17. Letichevsky A. Algebra of behavior transformations and its applications. In: Structural Theory of Automata, Semigroups, and Universal Algebra, NATO Science Series II: Mathematics, Physics and Chemistry. Kudryavtsev V.B., Rosenberg I.G. (Eds.). Dordrecht: Springer, 2005. Vol. 207. P. 241–272.

  18. Letychevskyi O., Letichevsky A. Predicate transformers and system verification. Proc. Third International Workshop on Symbolic Computation in Software Science (SCSS 2010). (29–30 July 2010, Hagenberg, Austria). Hagenberg, 2010. P. 148-149.

  19. Letychevskyi O., Letichevsky A., Godlevsky A., Guba A., Peschanenko V., Kolchin A. Invariants in symbolic modeling and verification of requirements. Proc. 9th Conference Computer Science and Information Technologies (CSIT 2013). (23–27 September 2013, Yerevan, Armenia). Yerevan, 2013. P. 23–27.

  20. Reva L., Kulanov L., Kharchenko V. Design fault injection-based technique and tool for FPGA projects verification. Proc. 9th East-West Design & Test Symposium (EWDTS 2011). (9–12 September 2011, Sevastopol, Ukraine). Sevastopol, 2011. P. 1–6.

  21. Kharchenko V., Odarushchenko O., Sklyar V., Ivasyuk A. Fault insertion testing of FPGA-based NPP I&C systems: SIL certification issues. Proc. International Conference on Nuclear Engineering (ICONE 22). (11–14 July 2014, Prague, Czech Republic). Prague, 2014. Vol. 6. P. 1–8. https://doi.org/10.1115/ICONE22-31163.

  22. Yasko A., Babeshko E., Kharchenko V. Verification of FPGA based NPP I&C systems considering multiple faults: Technique and automation tool. Proc. International Conference on Nuclear Engineering (ICONE 25). (2–6 July 2017, Shanghai, China). Shanghai, 2017. Vol. 9. P. 1–9. https:// doi.org/10.1115/ICONE25-67065.

  23. Kharchenko V., Illiashenko O. Diversity for security: case assessment for FPGA-based safety-critical systems. MATEC Web of Conferences. 2016. Vol. 76. P. 1–9. https://doi.org/10.1051/matecconf/ 20167602051.

  24. Illiashenko O., Kharchenko V., Panarin A., Sklyar V. Hardware diversity for safety of critical instrumentation and control systems. Proc. 9th IEEE International Conference on Intelligent Data Acquisition and Advanced Computing Systems: Technology and Applications (IDAACS 2017). (21–23 September 2017, Bucharest, Romania). Bucharest, 2017. P. 907–911.

  25. IEC 61508:2010. Functional safety of electrical/electronic/programmable electronic safety-related systems. IEC Standards, 2010. 594 p. URL: https://www.iec.ch/functionalsafety/standards/page2.htm.
© 2020 Kibernetika.org. All rights reserved.