UDC 004.274
1 Uniwersytet Zielonogorski, Zielona Gura, Poland, and Vasyl’ Stus Donetsk National University, Vinnytsia, Ukraine
 A.Barkalov@iie.uz.zgora.pl
|
2 Uniwersytet Zielonogorski, Zielona Gura, Poland, and Kharkiv National University of Radio Electronics, Kharkiv, Ukraine
L.Titarenko@iie.uz.zgora.pl
|
3 Vasyl’ Stus Donetsk National University and Peoly LLC, Vinnytsia, Ukraine
a.baev@donnu.edu.ua
|
4 V.M. Glushkov Institute of Cybernetics, National Academy of Sciences of Ukraine, Kyiv, Ukraine
avmatv@ukr.net
|
MIXED ENCODING OF COLLECTIONS OF MICROOPERATIONS
FOR MICROPROGRAMMED AUTOMATA
Abstract. A method is proposed for reducing the number of LUTs in the circuit of a microprogrammed Mealy FSM.
The method is based on elimination of some elements from the sets of microoperations for their implementation by EMB.
This approach reduces logic levels and interconnections for a circuit implemented with LUTs.
An algorithm is proposed for searching a partition of the set of micro-operations. An example of synthesis is given as well as results of the investigations.
Keywords: Mealy FSM, synthesis, FPGA, LUT, EMB, encoding of collections of micro-operations.
FULL TEXT
REFERENCES
- Soloviev V.V. Designing digital circuits based on programmable logic integrated circuits. Moscow: Goryachaya liniya – TELECOM, 2001. 636 p.
- Grushnitsky R.I., Mursaev A.Kh., Ugryumov E.P. Designing systems using programmable logic chips. SPb: BHV-Petersburg, 2002. 608 p.
- Tiwari A., Tomko K. Saving power by mapping finite state machines into embedded memory blocks in FPGAs. Proc. Design, Automation and Test in Europe Conference and Exhibition (Paris, France, 6–20 Feb. 2004). 2004. Vol. 2. P. 916–921.
- Skliarova I., Sklyarov V., Sudnitson A. Design of FPGA-based circuits using hierarchical finite state machines. Tallinn: TUT Press, 2012. 240 p.
- Czerwinski R., Kania D. Finite state machines logic synthesis for complex programmable logic devices. Berlin: Springer, 2013. 172 p.
- DeMicheli G. Synthesis and optimization of digital circuits. New York: McGraw-Hill, 1994. 576 p.
- Baranov S. Logic synthesis for control automata. Dordrecht: Kluwer Academic Publishers, 1994. 312 p.
- Garcia-Vargas I., Senhadji-Navarro R., JimБnez-Moreno G., Civit-Balcells A., Guerra-Gutierrezz P. ROM-based finite state machines implementation in low cost FPGAs. IEEE Intern. Simp. on Industrial Electronics (ISIE’07) (Vigo, 2007). 2007. P. 2342–2347.
- Rawski M., Tomaszewicz P., Borowski G., uba T. Logic synthesis method of digital circuits designed for implementation with embedded memory blocks on FPGAs. In: Design of Digital Systems and Devises. Lecture Notes in Electrical Engineering. Adamski M., Barkalov A., Wegrzyn M. (Eds.). Vol. 79. Berlin: Springer, 2011. P. 121–144.
- Sklyarov V., Skliarova I., Barkalov A., Titarenko L. Synthesis and optimization of FPGA-based systems. Berlin: Springer, 2014. 432 p.
- Rawski M., Selvaraj H., uba T. An application of functional decomposition in ROM-based FSM implementation in FPGA devices. Journal of System Architecture. 2005. Vol. 51, Iss. 6–7. P. 424–434.
- Maxfield C. The design warrior’s guide to FPGAs. Orlando: Academic Press, 2004. 542 p.
- Grout I. Digital systems design with FPGAs and CPLDs. Amsterdam: Elsevier, 2008. 784 p.
- White paper FPGA architecture. URL: www.altera.com.
- UG473 (v1.14) July 3, 2019. URL: www.xilinx.com.
- Yang S. Logic synthesis and optimization benchmarks user guide. Version 3.0. Techn. Rep. Microelectronics Center of North Carolina, 1991. 43 p.
- Barkalov A., Titarenko L., Chmielewski S. Mixed encoding of collections of output variables for LUT-based FSMs. Journal of Circuits, Systems and Computers. 2019. Vol. 28, N 8. P. 1–21.
- Nowicka M., uba T., Rawski M. FPGA-based decomposition of boolean functions: Algorithms and implementations. Proc. of the 6th International Conference on Advanced Computer Systems (Szczecin, 1999). P. 502–509.
- Barkalov A., Titarenko L. Logic synthesis for FSM-based control units. Berlin: Springer, 2009. 233 p.
- Kolopienczyk M., Titarenko L., Barkalov A. Design of EMB-based Moore FSMs. Journal of Circuits, Systems and Computers. 2017. Vol. 21, N 7. P. 1–23.
- DEMAIN. URL: www.zpt.tele.pw.edu.pl/oprogramowanie/demain.html.
- Garcia-Vargas L., Senhaji-Navarro R. Finite state machines with input multiplexing: A performance study. IEEE Transactions on CAD of Integrated Circuits and Systems. 2015. Vol. 34, Iss. 5. P. 867–871.
- Barkalov A.A., Titarenko L.A., Efimenko K.N. Optimization of circuits of composite firmware control devices. Kibernetika i sistemnyj analiz. 2011. N 1. P. 179–188.
- Баркалов А.А., Титаренко Л.А. Преобразование кодов в композиционных микропрограммных устройств управления. Kibernetika i sistemnyj analiz. 2011. N 5. P. 107–118.
- An optimal state assignment for the combined automation. Upr. sist. maš. 2016. N 6. P. 34–39.
- Barkalov A.A., Titarenko L.A., Vizor Ya.Ye., Matvienko A.V., Gorina V.V. Synthesis of combined finite state machine with FPGAs. Upr. sist. maš. 2016. N 3. P. 16–22.
- Barkalov A.A., Titarenko L.A., Vizor Ya.Ye., Matvienko A.V. Reducing the hardware amount for the combined automata. Upr. sist. maš. 2017. N 4. P. 43–50.
