C&SA | Contents

Volume 56 >>> № 6 NOVEMBER — DECEMBER 2020

UDC 004.274

A.A. Barkalov¹, L.A. Titarenko², A.V. Baiev³, A.V. Matviienko⁴

¹ Uniwersytet Zielonogorski, Zielona Gura, Poland, and Vasyl’ Stus Donetsk National University, Vinnytsia, Ukraine

A.Barkalov@iie.uz.zgora.pl

² Uniwersytet Zielonogorski, Zielona Gura, Poland,
and Kharkiv National University of Radio Electronics, Kharkiv, Ukraine

L.Titarenko@iie.uz.zgora.pl

³ Vasyl’ Stus Donetsk National University and Peoly LLC, Vinnytsia, Ukraine

a.baev@donnu.edu.ua

⁴ V.M. Glushkov Institute of Cybernetics, National Academy
of Sciences of Ukraine, Kyiv, Ukraine

avmatv@ukr.net

OPTIMIZING THE SCHEME OF A COMBINED AUTOMATON IN THE ASIC BASIS

Abstract. A method is proposed for decreasing the area of the ASIC occupied by the scheme of a combined automaton. The method is based on encoding of the classes of pseudoequivalent states of Moore automaton by additional variables. This approach leads to a four-level scheme implemented as two nano-PLAs and decreases the area of nano-PLA generating microoperations of the Moore automaton and additional variables. An example of synthesis with the use of the proposed scheme is considered. The results of the efficiency analysis of the proposed method with the use of a library of benchmarks are presented.

Keywords: combined microprogrammed automaton, synthesis, nano-PLA, ASIC, pseudo-equivalent states.

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